As is known in the art, one type of memory system includes a memory controller that drives a set of Dual In-Line Memory Modules (DIMMs). One type of DIMM arrangement is a fully buffered DIMM (FB-DIMM) wherein the DRAM devices are buffered behind one or more buffer devices. The arrangement is shown in FIG. 1. The FB-DIMM channel uses a daisy-chain topology to provide expansion from a single DIMM per channel to up to 8 DIMMs per channel. The memory controller sends data on to the first DIMM where it is received and re-driven to the second DIMM. Each DIMM receives the data and again re-drives the data to the next DIMM until the last DIMM receives the data. The targeted DIMM then initiates the transmission of data in the opposite direction of the memory controller. As is also known in the art, many applications require low latency with greater than eight memory modules. Further, with the FB-DIMM arrangement, the memory controllers have only limited memory operation and therefore are not able to perform operations such as, atomic operations, e.g., a read-modify-write operation wherein data is to be read, modified, and written back into the memory before such read data is operated on by some other command, unless a separate “controller” chip is provided.